- Industry
What Is CoPoS? TSMC’s CoWoS Technology and Its Evolution Toward Panel-Level Packaging
As AI and HPC chip sizes continue to expand rapidly, advanced packaging is facing multiple challenges, including area utilization efficiency, warpage control, and cost structure. Although traditional CoWoS technology has established a critical position in the high-performance computing market, the physical limitations of circular wafers and ABF substrates are gradually becoming more apparent, making panel-level packaging an inevitable next step. This article explains the development background and technical characteristics of CoPoS packaging, while also comparing the differences between CoPoS and earlier CoWoS and CoWoP technologies. By adopting square glass panels as the core of its CoPoS architecture, CoPoS addresses the needs of larger and more highly integrated packages through higher unit throughput and improved structural stability, while also driving a new wave of growth momentum across equipment makers and the broader supply chain.
- Industry
What is WMCM? A New Technology for the 2nm Era?
As the industry advances toward the 2nm process node, WMCM has emerged as a key focus in advanced packaging. This article explores WMCM’s core technology principles, process architecture, and its differences compared with InFO and CoWoS. It also analyzes its advantages and limitations in high-density RDL, thermal performance, cost, and integration flexibility, and highlights key Taiwanese beneficiaries in the materials and equipment supply chain.
- Industry
What Is Backside Power Delivery Network (BSPDN)? The Technological Differences Among TSMC, Samsung, and Intel
As Moore’s Law approaches its physical limits, the bottleneck in chip scaling is no longer confined to transistors—it increasingly lies in power delivery. Traditional front-side power delivery networks (FSPDN) ultimately constraining performance and power efficiency.To sustain progress in advanced process nodes, TSMC, Intel, and Samsung have each moved forward with backside power delivery network (BSPDN) technologies. This article analyzes the fundamentals of backside power delivery, introduces TSMC’s Super Power Rail (SPR), and compares it with Intel’s PowerVia and Samsung’s BSPDN solutions. It further explores two critical steps in implementing backside power delivery—wafer thinning and reclaimed wafers—and examines how these technological shifts could reshape the market and supply chain.
- Industry
What Is CoPoS? TSMC’s CoWoS Technology and Its Evolution Toward Panel-Level Packaging
As AI and HPC chip sizes continue to expand rapidly, advanced packaging is facing multiple challenges, including area utilization efficiency, warpage control, and cost structure. Although traditional CoWoS technology has established a critical position in the high-performance computing market, the physical limitations of circular wafers and ABF substrates are gradually becoming more apparent, making panel-level packaging an inevitable next step. This article explains the development background and technical characteristics of CoPoS packaging, while also comparing the differences between CoPoS and earlier CoWoS and CoWoP technologies. By adopting square glass panels as the core of its CoPoS architecture, CoPoS addresses the needs of larger and more highly integrated packages through higher unit throughput and improved structural stability, while also driving a new wave of growth momentum across equipment makers and the broader supply chain.
- Industry
What is WMCM? A New Technology for the 2nm Era?
As the industry advances toward the 2nm process node, WMCM has emerged as a key focus in advanced packaging. This article explores WMCM’s core technology principles, process architecture, and its differences compared with InFO and CoWoS. It also analyzes its advantages and limitations in high-density RDL, thermal performance, cost, and integration flexibility, and highlights key Taiwanese beneficiaries in the materials and equipment supply chain.
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- Industry
2026/6/17
What Are Passive Components? A Complete Guide to MLCCs, Capacitors, Resistors, Inductors, and Industry Trends
As demand for AI servers continues to surge, passive components have evolved from supporting components into a key area of market focus. From MLCCs and resistors to power inductors, these fundamental electronic components play a critical role in ensuring the stable operation of AI servers, GPUs, and high-speed data transmission systems. This article explores the major categories of passive components, their functions, and industry trends, while examining how the AI boom is creating opportunities for specification upgrades and long-term structural growth across the passive components industry.
- Industry
2026/6/14
Trump’s Section 301 Tariffs Are Coming: How Will New 10%–12.5% Tariffs Impact Global Trade?
The Trump administration is shifting toward Section 301 as the foundation for a new long-term tariff framework. The Office of the United States Trade Representative (USTR) has proposed additional tariffs ranging from 10% to 12.5% on 60 economies, covering most goods imported into the United States, while maintaining exemptions for semiconductors, energy products, medical goods, and critical minerals. This article summarizes the latest developments regarding the proposed Section 301 tariffs, the scope of exempt products, and the potential implications for Taiwan, China, Vietnam, Japan, and global supply chains. It also examines the future direction of Trump's tariff policy and the challenges businesses may face.
- Industry
2026/6/9
Marvell Computex 2026 Key Takeaways: AI Infrastructure Competition Shifts from Computing Power to Connectivity
As AI models continue to grow in scale, the competitive focus of data centers is shifting from GPU computing power to high-speed connectivity. At Computex 2026, Marvell highlighted that AI infrastructure is gradually entering the era of the “connectivity bottleneck,” where technologies such as optical interconnects, Co-Packaged Optics (CPO), silicon photonics, and high-speed SerDes will become critical enablers of future growth. This article summarizes Marvell’s perspective on the evolution of AI data center architectures and how optical connectivity is expected to drive the next wave of AI infrastructure innovation.
- News
2026/6/8
fiisual Biweekly Oil Report: US-Iran Ceasefire Negotiations Deadlocked, Physical Market Remains Tight; Short-Term Oil Price Pullback Fails to Mask Medium Term Support Structure
From late May to early June, international oil prices fluctuated drastically amid the alternating tug-of-war between US-Iran diplomatic negotiations and military conflicts. On one hand, the market fell sharply due to expectations of progress in ceasefire talks; on the other hand, it briefly rebounded due to regional military escalation, presenting a highly uncertain overall trend. However, setting aside geopolitical noise and observing from the physical side, the structural tightness on the supply end remains unchanged, driven by the continued rapid destocking of US crude inventories, refinery utilization rates rising to high levels, robust export demand, and the difficulty of new capacity to immediately fill the gap. The short-term pullback in oil prices reflects more of a phased correction of the war risk premium rather than a fundamental weakening of the fundamentals. Against the backdrop of unresolved core differences between the US and Iran, and the fragile balance in the Middle East, the high-volatility environment for oil prices will continue.
- Industry
2026/6/2
NVIDIA GTC 2026 Highlights: The Shift from Generative AI to Agentic AI and Physical AI
NVIDIA GTC 2026 showcased a pivotal transition in the AI industry from Generative AI to Agentic AI. From the Vera Rubin platform and DSX AI Factory to the Agent Toolkit and Physical AI ecosystem, NVIDIA is accelerating the development of a comprehensive AI infrastructure spanning data centers, enterprise applications, personal computers, and robotics, offering a glimpse into the next wave of growth in AI computing and the semiconductor industry.
